Q: Does using the MemoryWrite command instead of the MemoryWriteInvalidate
command when writing a full cache line impact PCI-bus performance?
A: Yes. When you use the MemoryWrite command, you are disconnected by the host bridge
every eight bytes. Eight bytes is two data phases on
the PCI bus, and this is the width of the PowerPC data bus for a single
transaction. MemoryWrite and MemoryWriteInvalidate are more efficient, since
they transfer a complete cache line (i.e., 32 bytes or eight PCI data phases or
one PowerPC burst cycle).
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